1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and manufacturing system.
2. Description of the Prior Art
Semiconductor devices are produced by the fabrication process in combination of ion implantation, film deposition by means of sputtering equipment or CVD (chemical vapor deposition) equipment, transcription for delineating a mask pattern on a resist mask by exposing and developing, thin film process by etch, and washing/rinse. Each semiconductor device manufacturing equipment is handled as a separate machine. The process conditions in each equipment have been optimized for that single equipment, in most cases. More specifically, each of process engineers decides such process conditions as kind of feeding gas, gas flow rate, gas pressure, output power of high frequency waves, processing time, processing temperature, processing stage position, and the like on the basis of wafer process information and his/her empirical knowledge and performs many trial and error in order to optimize the conditions.
In one semiconductor fabrication process, the same semiconductor fabrication equipment such as including film deposition equipment and etching equipment are used in the production of prototype samples and in the production of final products, so that the specifications of prototype samples provided for the optimization of process conditions should be almost identical to those in the mass production. The optimum process conditions suitable for the final semiconductor devices are determined by using these prototypes.
Accordingly, for different final product devices, different process conditions corresponding thereto are required to be defined. For instance, in dry etching equipment for processing gate electrodes, the optimum process conditions may be varied depending on the deposition condition of polysilicon. This means that even a small change of the amount of impurity doping for the polysilicon or the ingredients of feeding gases in the deposition equipment requires to start over a totally renewed optimization of the etching conditions.
In the optimization of process conditions using the prototype samples, the period of time needed for the development of a new process and the number of wafers to be used will be different, depending on the ability of process engineers in charge. In particular, tens of wafers for the prototyping may be consumed, and a couple of weeks may be needed for one insufficiently skilled in the art. For a mass production of single product, the cost and period of development may not be a critical matter. However, for a production of small amount and variety of products, and if the wafer radius becomes larger, the development cost of process will occupy a correspondingly larger proportion of the total cost of the final product, resulting in a weaken competitiveness of the semiconductor device product.
In the deposition and dry etching equipment, the condition of inner wall surface of the equipment will be aged (fluctuations in the long-term running) by the sticked deposits and etching. The sufficient control of the processing time is indispensable and the exchange of expendable supplies together with the lavage of inner wall surface should be performed routinely. Since the inner wall of equipment is gradually and continuously changes of the behavior along with the total processing time, there may be a slight difference in the film thickness and the characteristics of the thin film made by the deposition equipment, also in the shape and selectivity of masks in the etching equipment when compared between the initial state (immediately after the lavage) and used stage (immediately before the next lavage). In particular, when processing a contact hole with a higher aspect ratio, there is likely occurred defects due to unopening (contact defects) just before the lavage. The margin of opening must be maintained even when sacrificing the mask selectivity.
In a semiconductor fabrication line, there are inspection apparatuses everywhere for detecting any defects of semiconductor devices and feeding back the information thereon to the fabrication equipment. For instance, in case of a defective contact of etching, part of wafer having been etched will be picked up to examine on a SEM (scanning electron microscope). Based on the information obtained from the inspection, etching conditions and lavage conditions will be considered again revising in order to improve the mass productivity of the semiconductor devices.
As another example in the semiconductor fabrication equipment for accelerating the response to a troublesome problem in exposure equipment, by connecting the computer in the semiconductor fabrication line to the exposure equipment vendor by networking the computer equipped in the exposing apparatus with the computer in the semiconductor fabrication line, there are disclosed Japanese Patent Application Laid-Open No. Hei 11-15520 and No. Hei 10-97966. As still another example, a system for performing fine tuning of exposure conditions in correspondence with the disparity between equipment is disclosed in the Japanese Patent Application Laid-Open No. 2000-100720.
In the Prior Art, since data is not shared among semiconductor fabrication equipment, process conditions must be optimized for each of mask patterns. Process conditions such as gas flow rate, pressure, input electric field power, processing temperature and the like may be determined almost unique from the wafer specification (the contents of processing in the preceding stages) and the accuracy of critical dimension control. When optimizing the processes, the process engineers in charge have to know well the correlation between the optimum conditions and the preceding processes up to that just before. However, the correlation to the preceding processes is not always clearly stated for the process engineers, so that the optimization of conditions has been achieved only by the trial and error method. This make it difficult to quickly accommodate to the processes for new semiconductor devices.
Fluctuations in the long term running of the fabrication equipment has been remedied by using such condition as that at the cost of selectivity and throughput, for the sake of prevent defects caused by the fluctuations in the long term running from being concluded. For example, in the process of contact holes, the openings is kept at the cost of mask selectivity. In a finer process where the resist mask becomes thinner, the process of deeper and finer holes will be difficult.
When finding a defect in the inspection means such as the inspection SEM and the like, the countermeasure to the defective product is the business of the process engineer in charge. The feedback of inspection result to the process condition may require long time, because the comprehension of the process in the preceding stages, experience, and very detailed analysis of the data are prerequisite even for one skilled in the process.
In the conventional mass production lines, the inspection result of a preceding stage is not reflected to the stage that follows. For instance, in case of the gate etching, the distribution control in correspondence with the thickness distribution of polycrystalline Si is not feasible, so that the amount to be etched in one plane may vary, and the underlaying oxide layer may be etched where the film thickness of polysilicon is thinner, causing a defective product. When making a contact hole, it is difficult to control the distribution by the etching equipment so as to accommodate to the aging fluctuations in the long term running on the distribution of the film thickness of the oxide layer.